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The RSX 'Reality Synthesizer' is a proprietary graphics processing unit (GPU) codeveloped by Nvidia and Sony for the PlayStation 3 game console. It is based on the Nvidia 7800GTX graphics processor and, according to Nvidia, is a G70/G71 (previously known as NV47) hybrid architecture with some modifications. The RSX has separate vertex and pixel shader pipelines. The GPU makes use of 256 MB GDDR3 RAM clocked at 650 MHz with an effective transmission rate of 1.3 GHz and up to 224 MB of the 3.2 GHz XDR main memory via the CPU (480 MB max). Although it carries the majority of the graphics processing, the Cell Broadband Engine, the console's CPU, is also used complementarily for some graphics-related computational loads of the console.
Unless otherwise noted, the following specifications are based on a press release by Sony at the E3 2005 conference,[1] slides from the same conference,[2] and slides from a Sony presentation at the 2006 Game Developer's Conference.[citation needed]
The RSX has a floating-point performance of 192 GFLOPS.[3]
Other features: Support for Bilinear, trilinear, anisotropic, quincunx texture filtering, quincunx antialiasing, up to 4xMSAA, SSAA, Alpha to Coverage and Alphakill.
90nm:
65nm:
40nm:
Although the RSX has 256 MB of GDDR3 RAM, not all of it is usable. The last 4 MB is reserved for keeping track of the RSX internal state and issued commands. The 4 MB of GPU Data contains RAMIN, RAMHT, RAMFC, DMA Objects, Graphic Objects, and the Graphic Context. The following is a breakdown of the address within 256 MB of the RSX.
Address Range | Size | Comment |
---|---|---|
0000000-FBFFFFF | 252 MB | Framebuffer |
FC00000-FFFFFFF | 4 MB | GPU Data |
FF80000-FFFFFFF | 512KB | RAMIN: Instance Memory |
FF90000-FF93FFF | 16KB | RAMHT: Hash Table |
FFA0000-FFA0FFF | 4KB | RAMFC: FIFO Context |
FFC0000-FFCFFFF | 64KB | DMA Objects |
FFD0000-FFDFFFF | 64KB | Graphic Objects |
FFE0000-FFFFFFF | 128KB | GRAPH: Graphic Context |
Besides local GDDR3 memory, main XDR memory can be accessed by RSX too, which is limited to either:
System bandwidth (theoretical maximum):
Because of the aforementioned layout of the communication path between the different chips, and the latency and bandwidth differences between the various components, there are different access speeds depending on the direction of the access in relation to the source and destination. The following is a chart showing the speed of reads and writes to the GDDR3 and XDR memory from the viewpoint of the Cell and RSX. Note that these are measured speeds (rather than calculated speeds) and they should be worse if RSX and GDDR3 access are involved because these figures were measured when the RSX was clocked at 550Mhz and the GDDR3 memory was clocked at 700Mhz. The shipped PS3 has the RSX clocked in at 500Mhz (front and back end, although the pixel shaders run separately inside at 550Mhz). In addition, the GDDR3 memory was also clocked lower at 650Mhz.
Processor | 256 MB XDR | 256 MB GDDR3 |
---|---|---|
Cell Read | 16.8GB/s | 16MB/s (15.6MB/s @ 650 MHz) |
Cell Write | 24.9GB/s | 4GB/s |
RSX Read | 15.5GB/s | 22.4GB/s (20.8GB/s @ 650 MHz) |
RSX Write | 10.6GB/s | 22.4GB/s (20.8GB/s @ 650 MHz) |
Because of the very slow Cell Read speed from the 256 MB GDDR3 memory, it is more efficient for the Cell to work in XDR and then have the RSX pull data from XDR and write to GDDR3 for output to the HDMI display. This is why extra texture lookup instructions were included in the RSX to allow loading data from XDR memory (as opposed to the local GDDR3 memory).
The RSX is dedicated to 3D graphics, and developers are able to use different API libraries to access its features. The easiest way is to use high level PSGL, which is basically OpenGL|ES with programmable pipeline added in, however this is unpopular due to the performance overhead on a relatively weak console CPU. At a lower level developers can use LibGCM, which is an API that builds RSX command buffers at a lower level. (PSGL is actually implemented on top of LibGCM). This is done by setting up commands (via FIFO Context) and DMA Objects and issuing them to the RSX via DMA calls.
The RSX 'Reality Synthesizer' is based on the G70 architecture, but features a few changes to the core.[7] The biggest difference between the two chips is the way the memory bandwidth works. The G70 only supports rendering to local memory, while the RSX is able to render to both system and local memory. Since rendering from system memory has a much higher latency compared to rendering from local memory, the chip's architecture had to be modified to avoid a performance penalty. This was achieved by enlarging the chip size to accommodate larger buffers and caches in order to keep the graphics pipeline full. The result was that the RSX only has 60% of the local memory bandwidth of the G70, making it necessary for developers to use the system memory in order to achieve performance targets.[7]
Difference | RSX | nVidia 7800GTX |
---|---|---|
GDDR3 Memory bus | 128bit | 256bit |
ROPs | 8 | 16 |
Post Transform and Lighting Cache | 63 max vertices | 45 max vertices |
Total Texture Cache Per Quad of Pixel Pipes (L1 and L2) | 96kB | 48kB |
CPU interface | FlexIO | PCI-Express 16x |
Technology | 28 nm/40 nm/65 nm/90 nm | 110 nm |
Other RSX features/differences include:
Sony staff were quoted in PlayStation Magazine saying that the "RSX shares a lot of inner workings with NVIDIA 7800 which is based on G70 architecture."[citation needed] Since the G70 is capable of carrying out 136 shader operations per clock cycle, the RSX was expected to feature the same number of parallel pixel and vertex shader pipelines as the G70, which contains 24 pixel and 8 vertex pipelines.
Nvidia CEO Jen-Hsun Huang stated during Sony's pre-show press conference at E3 2005 that the RSX is twice as powerful as the GeForce 6800 Ultra.[2]
In the case of the PlayStation 3, the RSX was originally manufactured with the 90nm process. before transitioning to the 65nm, 40nm and finally the 28nm process. The 90nm version of the RSX was packaged (in the context of thermal strain) with incompatible die packaging elements. These factors lead to the Ball Grid Array (BGA) between the chip's interposer and its die failing at an abnormally fast rate.
Some of the factors of failure include
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